Channel limits for I2S
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Zip
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Channel limits for I2S
I've been reading the manual for lib_i2s and I'm kind of confused about the resource usage limits. Looking in table 4, I see that with a MCLK of 24.576 MHz and 32-bit words, the MAX IN and MAX OUT is 1. Does that mean that I can only have one input data port and one output data port? I was hoping I could use XMOS chips to build a serious multichannel interface with 24 output channels and 16 input channels. That means 12 input ports and 8 output ports.
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Ross
Verified - XCore Legend
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These values do look rather pessimistic and the table is a little hard to interpret, IMO. Will chase this internally.
Though, for those kinds of channel counts we'd typically expect to use a TDM interface.
Are you just wanting to do I2S -> I2S or USB -> I2S?
Though, for those kinds of channel counts we'd typically expect to use a TDM interface.
Are you just wanting to do I2S -> I2S or USB -> I2S?
Technical Director @ XMOS. Opinions expressed are my own
