The XMOS processor family seems to have plenty of "oomph", but are they suitable to use as emulated CPUs for older, hard-to-get 8 & 16-bit CPU families ?
I'm thinking of some of the early CPUs that are commonly emulated by software in MAME / MESS environments (mainly for retrogaming), e.g. 6809, 6800/05, 8085, TMS9900, etc. All of these are classic CPUs with no special hardware like ADCs. Just plain old address and data busses, interrupt pins, digital I/O ports etc. This would seem like a reasonable fit for an XMOS CPU.
To interface the XMOS CPU to the original boards would obviously require a suitable adapter PCB with appropriate bus drivers, power supply regulators, etc. to suit the pinout and footprint of the original processor, plus the actual opcode and register emulation (possibly borrowing straight from MAME/MESS).
I'm thinking of cases where the original CPUs are EOL, but there's a desire to preserve the original system as intact as possible.
It seems that the XMOS processors have enough I/O, but how to put that 400 MIPS of processing and those 8 threads per core to the best use ... I'm still not familiar enough with the architecture to say for sure !
J
Using XMOS processor to emulate an older 8/16 bit CPU/MCU
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We are currently working on emulating a sensor network on a XMP64 to use as a development and evaluation platform for a distributed embedded system dependability research project. This system will include an emulation of TI's MSP430 CPU - however, our project is currently in the design stage.
One problem with using the compute power of the XMOS CPUs for a straightforward emulation is that the maximum CPU speed for one thread is restricted to 100 MHz. We are currently thinking of emulating the 3-stage pipeline of the MSP430 using three threads and using a fourth thread for emulating I/O. However, since we are targeting the XMP64 with that project, we are (obviously) not planning to build a pin- or cycle-exact emulation of the MSP430.
The available CPU power of the XMOS CPUs should definitely be sufficient. There are already some projects emulating 8 bit systems on small microcontrollers like the AVR (e.g., http://spritesmods.com/?art=avrcpm - there are more current versions of these, but the description of these updates seems to be in German only). Emulating a 6502 CPU on a 20 MHz AVR is also possible. However, cycle-exact bus behaviour is difficult to impossible with the CPU and I/O speed available in these small microcontrollers.
An inspiration how to build a replacement CPU module with an XMOS processor could be the GODIL FPGA modules (see, e.g., http://www.trenz-electronic.de/products ... ronik.html). These modules contain a Xilinx Spartan 3S500E FPGA, a boot flash ROM and bidirectional 3.3<->5V level shifters. The pinout of these modules is configurable, so you can put the power supply pins anywhere they are required.
We are currently using the GODIL to run an adaptation of the http://visual6502.org transistor-level emulation of the 6502 CPU in real 6502- (and, adapted, 6510-)based systems like Commodore's VIC20, C64, and VIC1541 as well as an Apple //e clone. Some pictures can be found at http://visual6502.org/wiki/index.php?ti ... on_an_FPGA (towards the end of that page).
Using an XMOS board similar to the proposed XS1L1 DIL adapter (with level shifters added) should work similar to the GODIL FPGA approach. It will be interesting to see if real-time instruction and I/O behaviour can be achieved.
One problem with using the compute power of the XMOS CPUs for a straightforward emulation is that the maximum CPU speed for one thread is restricted to 100 MHz. We are currently thinking of emulating the 3-stage pipeline of the MSP430 using three threads and using a fourth thread for emulating I/O. However, since we are targeting the XMP64 with that project, we are (obviously) not planning to build a pin- or cycle-exact emulation of the MSP430.
The available CPU power of the XMOS CPUs should definitely be sufficient. There are already some projects emulating 8 bit systems on small microcontrollers like the AVR (e.g., http://spritesmods.com/?art=avrcpm - there are more current versions of these, but the description of these updates seems to be in German only). Emulating a 6502 CPU on a 20 MHz AVR is also possible. However, cycle-exact bus behaviour is difficult to impossible with the CPU and I/O speed available in these small microcontrollers.
An inspiration how to build a replacement CPU module with an XMOS processor could be the GODIL FPGA modules (see, e.g., http://www.trenz-electronic.de/products ... ronik.html). These modules contain a Xilinx Spartan 3S500E FPGA, a boot flash ROM and bidirectional 3.3<->5V level shifters. The pinout of these modules is configurable, so you can put the power supply pins anywhere they are required.
We are currently using the GODIL to run an adaptation of the http://visual6502.org transistor-level emulation of the 6502 CPU in real 6502- (and, adapted, 6510-)based systems like Commodore's VIC20, C64, and VIC1541 as well as an Apple //e clone. Some pictures can be found at http://visual6502.org/wiki/index.php?ti ... on_an_FPGA (towards the end of that page).
Using an XMOS board similar to the proposed XS1L1 DIL adapter (with level shifters added) should work similar to the GODIL FPGA approach. It will be interesting to see if real-time instruction and I/O behaviour can be achieved.
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Thanks for your reply. I still have a lot to learn about the XMOS CPUs and how to use them to their best effect. I will have a look at the other links you provided and then figure out how best to proceed. Right now, it seems like getting my hands on one of the eval boards and learning my way around the XMOS architecture's features is probably the best place to start. The CPUs I was hoping to emulate are running at relatively low clock speeds, so hopefully the available threads on a single-core XMOS procesor running at 400 MHz should be sufficient to be cycle-accurate.
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A starting point could be one of the multiple C implementations of a Z80 emulator. They fit (the one from MAME, for instance) in memory. Tweaking it for more speed is not that difficult but tedious (re-writting it in assembler).
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I completely forgot to mention that the Commodore 1541 floppy drive emulation project open1541 project already has a working 6502 (+peripherals) emulation running on an XS1-L1.
You can find more details in the repository at http://hg.berlios.de/repos/open1541/. Most related web pages still mention the project as using an ARM7 CPU, however, this was switched over to XMOS and the related code and schematics can be found in the repository.
You can find more details in the repository at http://hg.berlios.de/repos/open1541/. Most related web pages still mention the project as using an ARM7 CPU, however, this was switched over to XMOS and the related code and schematics can be found in the repository.
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There's a 6502 emulator in the XC-1 SID emulator project on the old xmoslinkers site
check out:
http://archive.xmoslinkers.org/node/240
check out:
http://archive.xmoslinkers.org/node/240
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skippy,
I'm pretty sure it's entirely doable to emulate a Z80 or such old 8-biter down to the pin/bus level and use it as a plug-in replacement for some the CPU on some existing board. (Voltage levels may be an issue I guess).
A while back I wrote an almost complete Z80 emulation for the Parallax Inc. Propeller MCU. Which is a multi-core device. Despite the fact that it's cores only run at 20MIPs that emulation, written in assembler, was almost up to speed of a real Z80. It was not however cycle accurate and did not did not drive a Z80 style bus interface.
The xcores must surely have enough horsepower to pull this off.
I'm pretty sure it's entirely doable to emulate a Z80 or such old 8-biter down to the pin/bus level and use it as a plug-in replacement for some the CPU on some existing board. (Voltage levels may be an issue I guess).
A while back I wrote an almost complete Z80 emulation for the Parallax Inc. Propeller MCU. Which is a multi-core device. Despite the fact that it's cores only run at 20MIPs that emulation, written in assembler, was almost up to speed of a real Z80. It was not however cycle accurate and did not did not drive a Z80 style bus interface.
The xcores must surely have enough horsepower to pull this off.
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I still wonder if it is not better to do a dynamic recompilation than a instruction emulator... where do I start... ?
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If you're looking at dynamic recompilation, then something like QEMU is a good place to start (see http://www.qemu.org/ ), but it might need more external memory for things like its translated code cache.
For my project, I was hoping to be able to keep the existing PCB from the CPU being emulated, pop a daughter board with the XMOS CPU and interface logic into the old CPU's socket, and run it at native speed, with all the original bus signals as-is (with the only exception being for the clock).
I think that's doable for older 8-bit or 16-bit architectures running at low to medium MHz clock rates (up to maybe 8-10MHz range).
For my project, I was hoping to be able to keep the existing PCB from the CPU being emulated, pop a daughter board with the XMOS CPU and interface logic into the old CPU's socket, and run it at native speed, with all the original bus signals as-is (with the only exception being for the clock).
I think that's doable for older 8-bit or 16-bit architectures running at low to medium MHz clock rates (up to maybe 8-10MHz range).
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You can totally emulate a z80 + some other stuff! The 'mame-on-a-stick' I did emulated the entire pacman hardware, including a z80. That said, I rewrote the z80 emulation using from scratch, which brought it down to about 11k for the entire hardware. If anyone's interested, I can post the code...
Yvo
Yvo