No High level on PHY_RST_N (USB HS Audio 2.0)

Technical discussions related to any XMOS development kit or reference design. Eg XK-1A, sliceKIT, etc.
misterten
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Joined: Mon Aug 08, 2011 10:06 am

No High level on PHY_RST_N (USB HS Audio 2.0)

Post by misterten »

I made an own design using the XS1-L1 128 TQFP. Everything went fine so far, which means that I was able to flash the device with an *.xe file. But i t seems that the program respectively the XS1-L1 doesn't start.

I noticed that the USB3318 needs a high level on its RESETB which should be given by the L1 on pin 4 named PHY_RST_N. But the L1 doesn't give the high state!? Any idea why?

13 MHz clock is running, MCLK_SEL is at low level. All voltages within tolerances.

regards
MaxFlashrom
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Posts: 82
Joined: Fri Nov 05, 2010 2:59 pm

Post by MaxFlashrom »

misterten wrote:I made an own design using the XS1-L1 128 TQFP. Everything went fine so far, which means that I was able to flash the device with an *.xe file. But i t seems that the program respectively the XS1-L1 doesn't start.

I noticed that the USB3318 needs a high level on its RESETB which should be given by the L1 on pin 4 named PHY_RST_N. But the L1 doesn't give the high state!? Any idea why?

13 MHz clock is running, MCLK_SEL is at low level. All voltages within tolerances.

regards
How did you flash the device? Have you added an XTAG2 male header to your board and plugged in an XTAG2? If so, I suggest you check the XTAG2 is working. xrun -l will recognise your L1 if all is well
Under devices it will report L1[0]. If xrun --dump-state produces a register and thread dump then things are working well within the processor.

I would then try to load a simple program through JTAG that does some printing(you can receive print output via JTAG)/toggles some lines.
The USB_RST_N you tell me is wired to pin4. This is X0D49, port 32A, bit 0. Try writing a program just to toggle this. If it does not toggle, and you have established that the processor is working then it may be shorted to something. Test continuity to adjacent pins/power/ground.

Max.
misterten
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Posts: 19
Joined: Mon Aug 08, 2011 10:06 am

Post by misterten »

Hi,

yes, I've added the header and flashed the device via XTAG2.

The L1 got recognized twice yesterday by Windows! But only twice out of twenty tries... :(
I know now that the L1 is working generally, but now I have to find out why it's starting rarely.

On the development board I've noticed the NCP303 (U8) which sets the SRST_N line delayed. Is it just for flashing purposes or does it take affect in L1's program starting sequence, too?
MaxFlashrom
Experienced Member
Posts: 82
Joined: Fri Nov 05, 2010 2:59 pm

Post by MaxFlashrom »

misterten wrote:Hi,

yes, I've added the header and flashed the device via XTAG2.

The L1 got recognized twice yesterday by Windows! But only twice out of twenty tries... :(
I know now that the L1 is working generally, but now I have to find out why it's starting rarely.

On the development board I've noticed the NCP303 (U8) which sets the SRST_N line delayed. Is it just for flashing purposes or does it take affect in L1's program starting sequence, too?
The 3V3 I/O supply must come up, and only when this is good must the core 1V0 supply come up. See XMOS hardware design checklist and example schematic. The SRST_N line is delayed by the NCP303LSN09. It waits until the voltage input reaches 0.9V and then it waits an additional amount of time determined by the capacitor before allowing the reset line to go high. This is to ensure that the Xcore resets properly. It has nothing to do specifically with flashing. I would concentrate on checking your device starts reliably and can run downloaded programs reliably before worrying about programming the flash. It is not necessary to program the flash to run programs. You could try running the device interrogation slowly with

Code: Select all

xrun -l --jtag-speed 100
from the command-line. So as not to conflict with the IDE, it is best to do this while not running that at the same time. This will query the board slowly.
If stuff is not working it will say "None" or "Error" under Devices rather than the desired "L1[0]"

Max.
misterten
Member++
Posts: 19
Joined: Mon Aug 08, 2011 10:06 am

Post by misterten »

Oh, it looks like the NCP303 doesn't stop to reset the L1. For about every 14ms it pulses a high level which resets the L1. +1V0 is okay, for C7 I used a 10n instead of a 1n but I don't think that this matters?

-----

Okay, it's an issue about my 1V source which can't cope with the current.

I removed the NCP303 from the development board and it is still running up every time when it is attached to USB. (?)