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How to enable xrun: XCore 0 ?

Post by Bayanaa »

I have USB AUDIO 2.0 DJ KIT  

when I run example code program gives following error:

Cannot load image, XCore 0 is not enabled

from some manual documents there is a command --enable-opt-boot but when I write this command on command prompt (within  xcore) error too:

error: Invalid command (Try 'help'..)

How to enable it?


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Post by sethu_jangala »

When bringing up a new board design or during production test the following error may be returned from xrun:

Cannot load image, XCore 0 is not enabled

This error message means that the XTAG or XTAG2 JTAG debug adapter can access the JTAG tap on the device, but cannot access the XCore tap on the device.

Possible reasons for this occurring can include:

1. The JTAG interface to the XCore has been disabled in the OTP security register.

2. The device is being permanently held in reset by the RST_N signal.

3. No clock is being supplied to the device.

4. The clock frequency supplied to the device is unsuitable for the selected PLL multiplier. The PLL multiplier is set using the MODE pins and should be configured so that the XCore boots up at or below its maximum frequency. Further details on the MODE pins can be found in the relevant device datasheet.

5. The VDD Core supply is outside of tolerance (1.0V +/-10%).

6. The VDD PLL supply is outside of tolerance (1.0V +/-10%) or not present. This will mean that the PLL is not locked and hence the XCore will be kept in reset. On an XS1-G series device the SS_PLL_LOCK output signal can be used to drive an active-high LED when the PLL has locked successfully.

7. The power supplies have not been correctly sequenced. The VDDIO (and OTP_VDDIO if present) supply must be within specification (3.0V-3.6V) before the VDD Core supply is turned on. Specifically, the VDDIO supplies should be within specification before VDD core reaches 0.4V.

8. The device, especially the ground paddle on the L1/L2 devices, has not been correctly soldered to the board. This can either be in the form of not connected solder joints or shorted solder joints to other pins, ground or power.