Number of threads per logical core

[Iodun]

I just read the XC programming guide and found the following statement:

"Each XS1 device has a limit of eight threads available on each of its processors, and a program that attempts to exceed this limit is invalid."

I know there are XS1 devices/chips with 1 or 2 tiles and 4 to 8 logical cores per tile...

What exactly is meant by the term 'processor' in the programming guide?

'1 processor = 1 tile' and exactly 1 thread = 1 logical core? => 4 or 8 threads per tile?

OR

'1 processor = 1 logical core' and each is able to run 8 threads? => 32 or 64 threads per tile?

OR

even something else?

 

[sethu_jangala]

Each tile(core/processor) has maximum of 8 logical cores(threads). 

[Ross]

Looks like that document is out of date (can you provide a link?)

Replace "Processor" with "Tile" and "Thread" with "Logical Core" (or "Core")

[Iodun]

https://www.xmos.com/en/xc-programming-guide?secure=1

Actually i found this guide with google search and i don't know where it is linked on the XMOS website.

My quotation can be found in the "XC Concurrency" -> "Creating Concurrent Threads" part.

There is also a code example about it:
 

par {

on stdcore[0] : uartTX(tx);

on stdcore[0] : uartRX(rx);

on stdcore[1] : lcdDrive(lcdData);

on stdcore[2] : kbListen(keys);

}

So if each logical core is able to run exactly one thread, what is specified with "stdcore(0)"?

As they are running multiple (two) threads on "stdcore(0)", this consequently has to be tile0?

The description says:

"Two of these threads are executed on XCore 0, one on XCore 1 and one on XCore 2."

So this actually means two on tile0, one on tile1 and one on tile2?

Is that correct?

Is this code still valid?

Or is the whole guide simply outdated?

[sethu_jangala]

According to the new naming scheme replace 'stdcore' with 'tile'. From the above par statement, two of the logical cores run on tile 0 and one core runs on tile 1 and the other runs on tile 2. This code is invalid for dual tile device.