what is the maximum limit of frequency by which we can drive

[jigneshprajapati]

We want to interface the ADC to XK 1A and xc-2 board. our adc runs on 20 MHz clock frequency. The ADC gives the output serially (24 bit) by giving the data ready (DRDY) output on DRDY pin of ADC. DRDY stays high for 50 ns.I am using buffered port of 32 bit and clocking block to sample the output (DRDY and DOUT) from ADC. For that we have used select case statement like below. select{ case DRDY when pinseq (1) :> void: clearbuf(DOUT); DOUT :> data3; break; } But We are missing the first bit of the output from adc and so the data is shifted in left by one bit.By using the header function like set_port_inv(sclk); and set_pad_delay(DOUT, 5);We can get the required data from adc upto 10MHZ frequency of clock for adc, but not for grater than 10 MHZ.is there any limit to frequency for port sampling? can i drive or sampled the port greater than 10 MHZ ?what is the maximum frequency for it?

[mon2]

Consider a different approach to sampling the outside fed data.

Use configure_in_port_strobed_slave which will configure your port to be an input port which will sample only when the 1 bit input strobe is high and will perform this task automatically. As specified below, the ready-in port (your strobe DRDY from your ADC will map to this pin) must be a 1 bit port.

Study 6.13 of this document:

https://www.xmos.com/published/xmos-programming-guide

Noting that a 100 Mbps Ethernet MII interface is one of the working examples using this programming method, you should have ample sampling speed for your task. The internal CPU clock is 100 Mhz for most devices and 125 Mhz for devices supporting 500 Mhz operation. Port sampling of upto 60 Mhz is possible when using an external clock. Each datasheet will define the max speed but fair to state your project should be possible to support. Review the 100 Mbps Ethernet source code (which is based on the XMOS Ethernet Slice board) for more details. Also, some of the devices feature an internal ADC which may or may not fit your requirements.

 

 

[mon2]

Do try this suggestion (configure_in_port_strobed_slave) as this method should allow for automated sampling from your ADC.

The 50ns high duration for DRDY is not an issue for the XMOS processors.

The following thread should serve as a valid example on how to use for as an input with strobe:

http://www.xcore.com/questions/2970/the ... nfigure_ou