Questions about USB port in xcore-200

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Questions about USB port in xcore-200

Postby skylaugher » Mon Dec 14, 2015 7:46 am

Dear Sir:

I had some confusion about the USB PORT in USB audio project. The development board is xCORE-200 MC Audio.

1.In P19 of the datasheet “XE215-512-TQ128” , there is a statement:”When the USB PHY is enabled on Tile 0,
the ports shown can on Tile 0 only be used with the USB PHY. When the USB PHY is enabled on Tile 1, then the
ports shown can on Tile 1 only be used with the USB PHY.”.

Does it mean we must left the ports used by USB unconnected in hardware design?

2.I tracked the port PORT_MCLK_COUNT(XS1_PORT_16B) in program.  It is used to judge SOF. PORT_MCLK_COUNT is
a 16bit port, but X1D36~X1D39 are multiplexed by MIDI/SPDIF. Can somebody explain it to me?
3.And I did not understand the statement “ set_port_clock(p_for_mclk_count, clk_audio_mclk2);”very well. 
Can somebody explain how the port p_for mclk_count woks?

4.In the hardware design of development board , there are BUTTON_1/BUTTON_2/BUTTON_3/SWITCH_1/LED_ROW_0/.....
I did not find any statement about these ports in USB audio project. Are these ports used in other project?

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Postby mon2 » Wed Dec 16, 2015 2:34 pm

Let me try to answer at least your first question. What this means is that if you wish to use the USB port on Tile 0 then you are required to use only the pins noted by the XMOS documentation for your USB port interface. This is mandatory due to internal multiplexing of the USB PHY / controller. Just the same, if you are enabling the USB port on Tile 0 then you cannot use the USB port on Tile 1 - that is the restriction.

If you enable USB port on Tile 1 then the same method of access is applicable. You may use USB port on Tile 1 only. Finally, if you are not using the USB or Ethernet port feature then the same port pins are available for general purpose GPIO use. Be sure to download the XCORE Port Map document which is a great and often updated spreadsheet which lists which port pins are mapped where for functions such as USB. Also note that even though some port pins are used by certain functions, the remainder of the port pins are still available for your access. This is a new feature on the XCORE-200 series. Again, the port map displays the mappings and we have confirmed their use in our lab. The older XMOS devices could not support this unique feature. ... nent=18106

Port Map for XCORE-200 devices

Hope this helps.

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