XU232 QSPI & Xlink boot

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
LumiCore
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Posts: 21
Joined: Fri Jul 01, 2016 6:36 am

XU232 QSPI & Xlink boot

Post by LumiCore »

Hi,

The design I'm working on has the XU232 on board, now in the phase of drawing schematics.
I'm trying to work out how this thing boots, since there is no public reference design available.

Let's see if I got it correctly, please correct me if I'm wrong:

- X0 has a QSPI device connected, like the reference design of the xCORE-200 USB sliceKIT and according to H.5 in the XU232 datasheet. All clear there.
- X1 boots from an internal link on XL0 to X0, like defined in the .xn file of reference code I have seen in an example. It does not use any of the available I/O pins for this, nor on X0.

Now comes the question mark area with some assumptions:

- X2 boots from X1 using a link. I'm assuming this is wired internally on chip if defined in the .xn file. Important must know for me is that no I/O pin is used for the link from X1 to X2.
I did see item 3 in H.7 in the datasheet so I wired this accordingly in the schematic.
- X3 boots from X2 using a link like X1 does from X0.

Hope this question is clear! Thanks in advance.


henk
Respected Member
Posts: 347
Joined: Wed Jan 27, 2016 5:21 pm

Post by henk »

Hi LumiCore,

Yes - this seems entirely correct.

Think of the 232 device as two 216-FB236 devices sitting side-by-side. X0 and X1 on the left-hand side, X2 and X3 on the right hand side

X0 boots from QSPI

X1 is connected to the same switch as X0; it boots over a channel end

X2 boots over a link from X0; to make it boot from link you must make sure that you set the boot mode of the right-hand-side device to boot from link (hence, the requirement to get pins X2D04..7 in the right state).

X3 is connected to the same switch that X2 is connected to, so it boots using the same link that X2 uses.

Cheers,
Henk
LumiCore
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Posts: 21
Joined: Fri Jul 01, 2016 6:36 am

Post by LumiCore »

Thanks for your confirmation Henk!
LumiCore
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Posts: 21
Joined: Fri Jul 01, 2016 6:36 am

Post by LumiCore »

Hi,

I have got the boards on my desk now. I see two devices, four tiles and can run/debug on them.
My program compiles without error or warning.

Now I have trouble to get the xflash file up and running.
I have amended the standard .xn file called 'XU232-1024-FB374-I40 Device' to the code below and made the makefile base itself on this.

Code: Select all

<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com"
         xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
         xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">
  <Type>Device</Type>
  <Name>XU232-1024-FB374-I40 Device</Name>

  <Declarations>
    <Declaration>tileref tile[4]</Declaration>
    <Declaration>tileref usb_tile[2]</Declaration>
  </Declarations>

  <Packages>
    <Package id="0" Type="XS2-UnA-1024-FB374">
      <Nodes>
        <Node Id="0" InPackageId="0" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="2">
		  <Boot>
			<Source Location="bootFlash"/>
			<Bootee NodeId="1" Tile="0"/>
		  </Boot>
		  <Tile Number="0" Reference="tile[0]">
            <Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
            <Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
            <Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
          </Tile>
          <Tile Number="1" Reference="tile[1]"/>
        </Node>
        <Node Id="1" InPackageId="1" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="3">
          <Boot>
          	<Source Location="LINK" BootMode="4"/>
          </Boot>
          <Tile Number="0" Reference="tile[2]"/>
          <Tile Number="1" Reference="tile[3]"/>
        </Node>
        <Node Id="2" InPackageId="2" Type="periph:XS1-SU" Reference="usb_tile[0]" Oscillator="24MHz">
        </Node>
        <Node Id="3" InPackageId="3" Type="periph:XS1-SU" Reference="usb_tile[1]" Oscillator="24MHz">
        </Node>
      </Nodes>
      <Links>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="7"/>
          <LinkEndpoint NodeId="1" Link="0"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="4"/>
          <LinkEndpoint NodeId="1" Link="3"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="6"/>
          <LinkEndpoint NodeId="1" Link="1"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="5"/>
          <LinkEndpoint NodeId="1" Link="2"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="0" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="2" Link="XL0" Delays="1clk,1clk"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="1" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="3" Link="XL0" Delays="1clk,1clk"/>
        </Link>
      </Links>
    </Package>
  </Packages>
  
  <ExternalDevices>
    <Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash" Type="S25FL116K">
      <Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS"/>
      <Attribute Name="PORT_SQI_SCLK"   Value="PORT_SQI_SCLK"/>
      <Attribute Name="PORT_SQI_SIO"  Value="PORT_SQI_SIO"/>
    </Device>
  </ExternalDevices>
  
  <JTAGChain>
    <JTAGDevice NodeId="0"/>
    <JTAGDevice NodeId="1"/>
  </JTAGChain>

</Network>
xflash gives this error message when I try to flash the board:
ERROR: No port 'XS1_PORT_1A' found on node 0 core 0
But I do not use XS1_PORT_1A anywhere in the program, nor in hardware. I cannot find any reference to it in code or the source of the error message in the tools and/or Google.

I'm probably missing something really obvious here...
henk
Respected Member
Posts: 347
Joined: Wed Jan 27, 2016 5:21 pm

Post by henk »

Hi LumiCore,

Can you confirm which version of the tools you are using?

Cheers,
Henk
LumiCore
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Posts: 21
Joined: Fri Jul 01, 2016 6:36 am

Post by LumiCore »

Hi Henk,

Version: Community_14.2.1 (build 15182, Jun-24-2016)
Version: 2.0.2.v20140221-1700

Thanks,
Bart
colin
Experienced Member
Posts: 74
Joined: Mon Dec 16, 2013 12:14 pm

Post by colin »

Hi LumiCore

You need to change your node id's and package id's around slightly as follows:

Code: Select all

       <Node Id="0" InPackageId="0" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="2">
        <Boot>
         <Source Location="bootFlash"/>
         <Bootee NodeId="2" Tile="0"/>
        </Boot>
        <Tile Number="0" Reference="tile[0]">
            <Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
            <Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
            <Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
          </Tile>
          <Tile Number="1" Reference="tile[1]"/>
        </Node>
        <Node Id="2" InPackageId="2" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="3">
          <Boot>
             <Source Location="LINK" BootMode="4"/>
          </Boot>
          <Tile Number="0" Reference="tile[2]"/>
          <Tile Number="1" Reference="tile[3]"/>
        </Node>
        <Node Id="1" InPackageId="1" Type="periph:XS1-SU" Reference="usb_tile[0]" Oscillator="24MHz">
        </Node>
        <Node Id="3" InPackageId="3" Type="periph:XS1-SU" Reference="usb_tile[1]" Oscillator="24MHz">
        </Node>
You will then also need to update your JTAG chain as follows.

Code: Select all

<JTAGChain>
    <JTAGDevice NodeId="0"/>
    <JTAGDevice NodeId="2"/>
  </JTAGChain>
This should get rid of the ERROR: No port 'XS1_PORT_1A' found on node 0 core 0. These changes were made to the 232 XN templates in 14.2.1 though I suspect you have a local copy of a 232 XN you perhaps created from a previous version of 14.X?

Colin.
LumiCore
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Posts: 21
Joined: Fri Jul 01, 2016 6:36 am

Post by LumiCore »

Hi Colin,

I had indeed based the .xn file on a previous format from 14.2.0 accidentally.

I did change the first line in your example for the OscillatorSrc to "1". Actually I have amended the standard template with the QSPI stuff. This is the current state of the .xn file:

Code: Select all

<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com"
         xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
         xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">
  <Type>Device</Type>
  <Name>XU232-1024-FB374-I40 Device</Name>

  <Declarations>
    <Declaration>tileref tile[4]</Declaration>
    <Declaration>tileref usb_tile[2]</Declaration>
  </Declarations>

  <Packages>
    <Package id="0" Type="XS2-UnA-1024-FB374">
      <Nodes>
        <Node Id="0" InPackageId="0" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="1">
		  <Boot>
			<Source Location="bootFlash"/>
			<Bootee NodeId="2" Tile="0"/>
		  </Boot>
		  <Tile Number="0" Reference="tile[0]">
            <Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
            <Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
            <Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
          </Tile>
          <Tile Number="1" Reference="tile[1]"/>
        </Node>
        <Node Id="2" InPackageId="2" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="3">
          <Boot>
          	<Source Location="LINK" BootMode="4"/>
          </Boot>
          <Tile Number="0" Reference="tile[2]"/>
          <Tile Number="1" Reference="tile[3]"/>
        </Node>
        <Node Id="1" InPackageId="1" Type="periph:XS1-SU" Reference="usb_tile[0]" Oscillator="24MHz">
        </Node>
        <Node Id="3" InPackageId="3" Type="periph:XS1-SU" Reference="usb_tile[1]" Oscillator="24MHz">
        </Node>
      </Nodes>
    <Links>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="7"/>
          <LinkEndpoint NodeId="2" Link="0"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="4"/>
          <LinkEndpoint NodeId="2" Link="3"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="6"/>
          <LinkEndpoint NodeId="2" Link="1"/>
        </Link>
        <Link Encoding="5wire" Delays="3clk">
          <LinkEndpoint NodeId="0" Link="5"/>
          <LinkEndpoint NodeId="2" Link="2"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="0" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="1" Link="XL0" Delays="1clk,1clk"/>
        </Link>
        <Link Encoding="5wire">
          <LinkEndpoint NodeId="2" Link="8" Delays="52clk,52clk"/>
          <LinkEndpoint NodeId="3" Link="XL0" Delays="1clk,1clk"/>
        </Link>
      </Links>
    </Package>
  </Packages>
  
  <ExternalDevices>
    <Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash" Type="S25FL116K">
      <Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS"/>
      <Attribute Name="PORT_SQI_SCLK"   Value="PORT_SQI_SCLK"/>
      <Attribute Name="PORT_SQI_SIO"  Value="PORT_SQI_SIO"/>
    </Device>
  </ExternalDevices>
  
  <JTAGChain>
    <JTAGDevice NodeId="0"/>
    <JTAGDevice NodeId="2"/>
  </JTAGChain>

</Network>
I'm still unsure about the BootMode for Node 2. I had it set to 4, but looking at the Links provided in the template it probable has to be set to 6. Can you please confirm?

Anyway, I can now successfully program the flash!

When I reset the system I can see activity on all QSPI lines, like the processor is trying to boot.
These signals come to a halt (it's not like the booting process continues like described in other forum threads) but the program does not start.

There is a burst of 10MHz clk and data with ~580us cs low.
Then there is 580us of no action.
Then a burst with 16MHz clk of about 1.8ms.

Is there any way I can query the booting status of the tiles with the XTAG connecter after the chip has tried to boot from Flash?

Thanks!
colin
Experienced Member
Posts: 74
Joined: Mon Dec 16, 2013 12:14 pm

Post by colin »

Hi LumiCore,

Links 0, 1, 2 and 3 are physically wired up on the second node in the 224/232 package. You therefore need to use a BootMode that enables these links in the BootROM. You can use BootMode 4 as link 0 is enabled in 2wire mode. Alternatively you can use BootMode 6 (links 1 and 2 enabled) or BootMode 7 (links 0, 1, 2, 3 enabled). Boot Modes 6 and 7 would be faster as the BootROM enables these in 5wire mode by default.

You can use the attached xlreg script to obtain some debug info from the xcore if booting fails. To use do as follows:

xgdb
(gdb) attach
(gdb) source xlreg
(gdb) xlreg

If you paste the output here I'll take a look and see if I can spot what is going on.

Colin
Attachments
xlreg.txt
debug boot script (remove the .txt extension I had to add it to bypass the security filters in this forum)
(11.75 KiB) Downloaded 330 times
xlreg.txt
debug boot script (remove the .txt extension I had to add it to bypass the security filters in this forum)
(11.75 KiB) Downloaded 330 times
LumiCore
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Posts: 21
Joined: Fri Jul 01, 2016 6:36 am

Post by LumiCore »

Hi Colin,

Thanks! Here is the result:

Code: Select all

Thread 1 (tile[0] core[0]):

Thread 2 (tile[1] core[0]):

Thread 3 (tile[2] core[0]):

Thread 4 (tile[3] core[0]):

Node 0x0000
  Routing ID 0x0000
    PLL reg 0x00803f00 [OD=1+1 F=(63+1)/2 R=0+1]
            ratio 16.000000 [320/384/400 @20/24/25 Mhz]
  Reference Clock Divider 0x0003
  BootMode : 0x0027
  Dirs: 0000000000000000
  Link 0  not enabled
  Link 1  not enabled
  Link 2  not enabled
  Link 3  not enabled
  Link 4  not enabled
  Link 5  not enabled
  Link 6  not enabled
  Link 7  not enabled
  Link 8  not enabled
  Tile routing ID 0x0000
    PLL clock divider 99
    PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
  Tile routing ID 0x0001
    PLL clock divider 99
    PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0

Node 0x0001
  Routing ID 0x0000
    PLL reg 0x00803f00 [OD=1+1 F=(63+1)/2 R=0+1]
            ratio 16.000000 [320/384/400 @20/24/25 Mhz]
  Reference Clock Divider 0x0003
  BootMode : 0x0027
  Dirs: 0000000000000000
  Link 0  not enabled
  Link 1  not enabled
  Link 2  not enabled
  Link 3  not enabled
  Link 4  not enabled
  Link 5  not enabled
  Link 6  not enabled
  Link 7  not enabled
  Link 8  not enabled
  Tile routing ID 0x0000
    PLL clock divider 99
    PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
  Tile routing ID 0x0001
    PLL clock divider 99
    PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
    PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
(gdb)
It appears that both boot modes are equal for the Nodes? which I would not expect according to the hardware setup (X2D06 pulled high). But maybe I interpret the result wrongly.
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