Xmos link to FPGA
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				Folknology
														 - XCore Legend
 - Posts: 1274
 - Joined: Thu Dec 10, 2009 10:20 pm
 
Xmos link to FPGA
I cannot seem to find it but remember that some work had been done in using Xmos links to FPGA. I am looking at the best way to connect Xmos chips to an FPGA if anyone has done this or has links to things that may be helpful..
			
			
									
							
		
				
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				mon2
														 - XCore Legend
 - Posts: 1913
 - Joined: Thu Jun 10, 2010 11:43 am
 
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				Bianco
														 - XCore Expert
 - Posts: 754
 - Joined: Thu Dec 10, 2009 6:56 pm
 
Hi Al,
I will work on some exciting new developments regarding this topic in the upcoming months.
If you want I can inform you by private message.
			
			
									
										
						I will work on some exciting new developments regarding this topic in the upcoming months.
If you want I can inform you by private message.
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				Folknology
														 - XCore Legend
 - Posts: 1274
 - Joined: Thu Dec 10, 2009 10:20 pm
 
Thanks Bianco
Please do DM me I would be very interested, I notice in your optical link it was vhdl based will this be similar or is there a possibility of it being Verilog based?
regards
Al
			
			
									
										
						Please do DM me I would be very interested, I notice in your optical link it was vhdl based will this be similar or is there a possibility of it being Verilog based?
regards
Al
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				larry
														 - Respected Member
 - Posts: 275
 - Joined: Fri Mar 12, 2010 6:03 pm
 
I found this implementation:
https://github.com/tmbinc/ov/tree/maste ... /src/xlink
It may be related to the project mon2 mentioned
			
			
									
										
						https://github.com/tmbinc/ov/tree/maste ... /src/xlink
It may be related to the project mon2 mentioned
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				Folknology
														 - XCore Legend
 - Posts: 1274
 - Joined: Thu Dec 10, 2009 10:20 pm
 
Thanks Larry, that looks interesting, will check it out, don't think it's related as this is verilog..
			
			
									
										
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				avignani
 - Member
 - Posts: 8
 - Joined: Tue Oct 07, 2014 3:21 pm
 
I can confirm that the xlink code on GitHub works fine, I use it daily between my XS1/XS2 and Altera/Xilinx FPGAs. I added 9-bit FIFOs to the input and output paths and access the link through two 16-bit registers. The management of control characters (HELLO,EOM..) and of credits is done in software by the linux driver.
Alberto
			
			
									
										
						Alberto
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				infiniteimprobability
														Verified - XCore Legend
 - Posts: 1179
 - Joined: Thu May 27, 2010 10:08 am
 
Cool! Good work & thanks for sharingI can confirm that the xlink code on GitHub works fine
