Connection to xSYS header

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LooZee
New User
Posts: 2
Joined: Sun Jul 31, 2016 2:13 pm

Connection to xSYS header

Post by LooZee »

Hello,

where do I have to connect pin 17 and 19 of the xSYS header on an XS1-L8A-64-TQ128?

I connected
pin 6 -> X0D16
pin 10 -> X0D17
pin 14 -> X0D18
pin 18 -> X0D19

In some schematic pin 17 is connected to X0D24 and pin 19 to X0D23. Would this be correct?

The table in the datasheet, section 4, page 7 is absolutely incomprehensible to me :/

Thanks in advance.
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mon2
XCore Legend
Posts: 1913
Joined: Thu Jun 10, 2010 11:43 am

Post by mon2 »

Hi LooZee.
I connected
pin 6 -> X0D16
pin 10 -> X0D17
pin 14 -> X0D18
pin 18 -> X0D19
Looks fine to me. The above wiring is critical to allow for the XTAG tool to interface with your XMOS CPU.
where do I have to connect pin 17 and 19 of the xSYS header on an XS1-L8A-64-TQ128?
This is a choice you will have to make with respect to your specific design. Keep in mind that the XMOS devices are s/w programmable to morph to your IP. Noting this feature, you can select the port pins for the respective TX & RX functions for debugging (ideally should be single bit port pins).
In some schematic pin 17 is connected to X0D24 and pin 19 to X0D23. Would this be correct?
Yes, if you have the same port pins free in your design. However, as noted, you could easily shift to use X0D11 & X0D12, etc. Regardless, when you write your s/w, you will then need to use the respective new port pins for the TX & RX functions. Simple as that. The XMOS pins are 3v3 CMOS pins and the XTAG tool is expecting the same. Using a small piece of UART code, you can 'printf' debug values via this UART IP to inform your host PC that 'I am here with value xx'. However, using printf and UART interface is not recommended due to the lack of real-time debugging. The UART is blocking so could hinder the true evaluation of the XMOS processors. Scan this user forum on alternate methods for debugging using the XTAG tool. It will be wise to still allow for the TX & RX pins, as a fall back debug method.

On the port map, yup, very confusing at the start. Have a look at this brief document which may help to understand the madness of these devices:

https://www.xmos.com/download/private/X ... 7438A).pdf

The priority of the port pins is that the table should be read from LEFT to RIGHT.

So, if you make use of a port with the HIGHEST priority (left) then the respective right side port definition CANNOT be used.

example: X0D36 = 1M0 8D0 16B8

So, let us say you want 1M0 for your TX function. If you proceed to map 1M0 into your code then you automatically will lose the use of Bit 0 on the 8 Bit port 'D'. This means you can continue to use the 8 Bit port 'D' but will have no control on the Bit 0 since this same port pin was taken away as 1M0.

The same idea for 16 bit port 'B'. You can continue to use the 16 bit port 'B' but will lose Bit 8 for the same reason, it has been assigned to 1M0.

As you can expect, a 16 Bit port will operate as a 16 Bit port in a single clock cycle vs. the 8D port which operates on 8 bits on a single clock cycle vs. 1M0 = single bit port of which only Bit 0 is used to i/o on that port.

So if you wish to toggle a LED, then toggle Bit 0 on port 1M on Tile # 0 with an LED attached (with a current limit resistor connected to 3V3) onto port X0D36.

With the anode of the LED to the current limit resistor and then 3V3, if X0D36 = 0, the LED will glow (ON). If X0D36 = 1, the LED will be OFF.

Another way to understand this port mapping concept is that a single physical IC port pin can only be assigned to a single internal digital piece of logic - which logic pin do you wish to map ?

The other XMOS concept to watch out for is the port name = X0D36 = the 2nd position of this port name defines that you are working with Tile # 0 as compared to X1D36 = Tile # 1. This little concept breaks a lot of code when learning about XMOS CPUs.

You must define the proper Tile # else you are 'shooting blanks' with the wrong bank of processors.

Each thread = software CPU.

A tile can host a number of CPUs (threads) and upto 4 / 8 CPUs are common. XMOS offers a mix of multi-tile devices now.

You will have to properly plan the use of the port pins, CPU usage to correctly define the PCB design. If designing a custom PCB, post the relevant schematics for a quick review before starting to prototype. The power supply does need to be sequenced so best to review some of the reference board schematics from XMOS.

Review this excellent article on the XMOS StartKit (also relevant to your device):

https://www.xcore.com/forum/viewtopic.php?f=44&t=3440

The above is a very coarse explanation but hope this helps. Write back if something is not clear.

Kumar
LooZee
New User
Posts: 2
Joined: Sun Jul 31, 2016 2:13 pm

Post by LooZee »

Hi Kumar,

thank you for your detailed explanation. I'm thrilled :)
I think I got it.

Thank you so much!