XZPU - an XMOS based ZPU implementation

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XZPU - an XMOS based ZPU implementation

Post by octal »

Version: 0.01
Status: Under development
License: BSD

The ZPU is a small 32 bit, portable CPU core with a GCC toolchain and eCos RTOS support.

This project aim at providing an implementation of this portable CPU core on XMOS architecture.
Planed features are:

- the possibility to have code fetched from an external RAM/Flash.

- the possibility to have multiple zpu created and launched in parallel, with one zpu = one thread

- the possibility to have multiple zpu created and launched in parallel in different processors (nice for G4)

- extension of the ZPU RTL to let user create threads on an XMOS (by forking actual executing program ... or ...)

- extension the RTL to give access to ports, and (most important) to give the possibility to use any software component running on an XMOS (SPI, Eth, UART, ...) maybe by defining some kind of a hardware abstraction layer.
Users will be able to program this CPU with GCC (there exists already a port of GCC for this processor), whitch mean that you can already program it with C, C++, Fortran (yeah). Programs can have almost any size (provided necessary ram internal or EXTERNAL is available for the system).
More details about ZPU here :


http://repo.or.cz/w/zpu.git?a=blob_plai ... ml;hb=HEAD
This soft processor will let users create re-programmable systems, AMINO like boards for example can load precompiled programs through ethernet and execute them locally without having to keep connection alive to an external system. This makes it possible to execute external building bricks completely written in C/C++ or Fortran (and compiled via GCC) of any size!

This processor implementationc can also be a very good starting point and a nice brick of the project "Microprocessor/Microcontroller educational kit" https://www.xcore.com/projects/micropro ... tional-kit

Users and students can later still use it as an educational case of use to try to implement simple compilers for the ZPU machine :)
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Post by octal »

Well, after a week of sickness, I'm again on the implementation of the XZPU.
I have finished first alpha that fetch code form internal XS1 ram and execute it.
To check all that, I wrote a PC/MAC application (C++/QT, works also under linux) that disassemble ZPU binaries and display them. I'm going to add communication routines to let me debug and step code inside any XZPU processor running in an XMOS.
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Post by Heater »

When implementing the ZPU VM on the Propeller MCU one issue is that the ZPU is big endian and the Propeller is little endian.
Up until now this was handled by reversing the order of every four bytes of the executable binary and then tweaking around with the addresses for byte and word accesses to get them ordered correctly.
That works but slows the VM a bit a makes interfacing with native code on the Propeller a pain.
One user Andrey Denyev has taken this matter in hand and modified zpu-gcc to work little endian. It is under test now.
As the xcore is also little endian this may be useful here also.

See here for the action: http://forums.parallax.com/showthread.p ... ost1002874
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Post by gschmott »

Just wondering if XZPU was ever successfully developed/deployed. I'm looking for a solution that might allow me to easily run a Lua VM on top of ZPU on a 16 core XMOS part. My (eventual) board will have an attached SPI flash I'd like to use to execute the code in-place.
Is this project dead?