Unable to start debugger on XL216-512 board Topic is solved

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
User avatar
BEBDigitalAudio
Experienced Member
Posts: 76
Joined: Thu Nov 11, 2010 7:45 pm

Unable to start debugger on XL216-512 board

Postby BEBDigitalAudio » Wed Aug 15, 2018 7:42 am

Hello everybody,

we have designed a board based on the XL216 processor with a XSYS connector on the board. We have only used the JTAG lines (nRST, TMS, TCK TDI and TDO), not XLINK but I think this OK, since we have older designs with XS1-L16 processors working like this since years.

Problem : we are unable to start the debugger when XTAG is connected to the processor.

When we open the debugger configuration window, we see "XMOS XTAG-3 connected to O[0][NWVVdfTZ]", so we assume that the XTAG is able to see the processor.

However, when we try to launch the application by the debugger, it stops immediately with the following error "Launching tester.xe has encountered a problem. Load failed"
A click on "details" button leads nowhere : "Load failed Please refer to http://www.xmos.com/knowledgebase/tools for more details" which is a page which does not exist anymore on XMOS website

The console reports :
connect --adapter-id NWVVdfTZ --jtagspeed 23
0x00000000 in ?? ()
load
Please refer to http://www.xmos.com/knowledgebase/tools for more details


We have tried to change the JTAG speed with different values : no success.
Power supplies are OK, the sequencing seems correct (a NCP303LSN30 to activate the 1V0 regulator and a NCP303LSN09 to activate the reset line)

So, right now, we have absolutely no idea where to look at...

If anybody has a suggestion...

Benoit
View Solution
User avatar
mon2
XCore Legend
Posts: 1385
Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Wed Aug 15, 2018 8:52 am

Please post a schematic of your design for a review.

Have you tested more than one of this custom design? Do all tested pcbs behave the same?
User avatar
BEBDigitalAudio
Experienced Member
Posts: 76
Joined: Thu Nov 11, 2010 7:45 pm

Postby BEBDigitalAudio » Wed Aug 15, 2018 9:00 am

mon2 wrote:Please post a schematic of your design for a review.

Have you tested more than one of this custom design? Do all tested pcbs behave the same?


I will make an excerpt of the schematics (the whole design is quite big and there are confidential things on it).

We have two prototypes for now and the second one does not start at all, the reset line remains active (we think we found the issue for this one from a bad component). I will make a test with this one and check if it behaves the same or not

I come back to you asap

Benoit
User avatar
mon2
XCore Legend
Posts: 1385
Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Wed Aug 15, 2018 9:24 am

Reset output is often open drain so please confirm there is a local pull up (10k or similar is ok) on the Xmos cpu reset pin to +3v3 define a logic high state.
User avatar
mon2
XCore Legend
Posts: 1385
Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Wed Aug 15, 2018 12:32 pm

What are the results from the following?

Code: Select all

xrun -l



Code: Select all

xrun --jtag-speed 1 xxx.xe


Please post your .XN file for this custom PCB.
User avatar
BEBDigitalAudio
Experienced Member
Posts: 76
Joined: Thu Nov 11, 2010 7:45 pm

Postby BEBDigitalAudio » Thu Aug 16, 2018 8:34 am

Hi Mon2,

before all, thank you for the help you provide, you help to feel less alone °-)

Here are the first answers to your questions :

Reset output is often open drain so please confirm there is a local pull up (10k or similar is ok) on the Xmos cpu reset pin to +3v3 define a logic high state

Yes, there is a 10k pullup following the NC7WZ07 chip (you will see it on the diagram)

xrun -l returns

Code: Select all

Available XMOS Devices
----------------------

  ID    Name                    Adapter ID      Devices
  --    ----                    ----------      -------
  0     XMOS XTAG-3             dGWcOKgb        O[0]


And xrun --jtag-speed 1 xxx.xe returns

Code: Select all

xrun: Cannot load image, XCore 0 is not enabled


I am preparing the schematics excerpt, so you can take a look to it. The XN file we use for that design is the following one

Code: Select all

<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">
  <Type>Board</Type>
  <Name>V Board Tester</Name>
 
  <Declarations>
    <Declaration>tileref tile[2]</Declaration>
  </Declarations>
 
  <Packages>
   <Package id="0" Type="XS2-LnA-512-TQ128">
      <Nodes>
          <Node Id="0" InPackageId="0" Type="XS2-L16A-512" SystemFrequency="500MHz" Oscillator="16MHz">
         <Boot>
            <Source Location="BootFlash"/>
         </Boot>
         <Tile Number="0" Reference="tile[0]"/>
            <Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
            <Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
            <Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
         <Tile Number="1" Reference="tile[1]"/>
        </Node>
      </Nodes>
    </Package>
  </Packages>
 
  <ExternalDevices>
   <Device NodeId="0" Tile="0" Class="SQIFlash" Name="BootFlash" Type="SST26VF016B">
      <Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS"/>
      <Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK"/>
      <Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO"/>
      <Attribute Name="QE_REGISTER" Value="quad_spi_qe_location_status_reg_0"/>
      <Attribute Name="QE_BIT" Value="quad_spi_qe_bit_6"/>
   </Device>
  </ExternalDevices>
 
  <JTAGChain>
    <JTAGDevice NodeId="0"/>
  </JTAGChain>
 
</Network>


And some measurements too :
- VDDIO voltage : 3.301 V
- VDDCore voltage : 1.009V
- VDDPLL voltage : 1.004V

(Stupid question by the way : how can I send here a PDF file for the schematics ? I can't find any button for that)

Benoit
User avatar
BEBDigitalAudio
Experienced Member
Posts: 76
Joined: Thu Nov 11, 2010 7:45 pm

Postby BEBDigitalAudio » Thu Aug 16, 2018 8:40 am

I forgot one thing : oscillator frequency is 16MHz, with a correct amplitude and acceptable overshoots)
User avatar
mon2
XCore Legend
Posts: 1385
Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Thu Aug 16, 2018 9:03 am

Hi. Please review the following webpage,

http://www.xmos.com/support/knowledgeba ... ot-enabled


To attach a pdf, select the attachments button below this editor window.

Update..

Review your clock value (section 7 of datasheet) vs. Internal Pll use. Are you using usb on this design? If yes, from memory, believe you will require 24 mhz or some multiple of this value. The 16 mhz is not a standard value for xmos with usb enabled unless this clock is applied with an external Pll? With the xl prefixed cpu assuming there is no usb port in use for your design.
User avatar
BEBDigitalAudio
Experienced Member
Posts: 76
Joined: Thu Nov 11, 2010 7:45 pm

Postby BEBDigitalAudio » Thu Aug 16, 2018 9:27 am

mon2 wrote:Hi. Please review the following webpage,

http://www.xmos.com/support/knowledgeba ... ot-enabled

To attach a pdf, select the attachments button below this editor window.


Hi Mon2,

we already checked all these points, that's why I decided to come here to get some support. The only point we can't really check is if the pad is correctly soldered or not (we don't have an X-RAY machine here), but the board has been made in a factory and they know their job, so we can trust them (and moreover, we see some solder going thru some vias)

Here are the schematics of the power supply and reset sections related to the XMOS

Benoit
You do not have the required permissions to view the files attached to this post.
User avatar
BEBDigitalAudio
Experienced Member
Posts: 76
Joined: Thu Nov 11, 2010 7:45 pm

Postby BEBDigitalAudio » Thu Aug 16, 2018 9:54 am

mon2 wrote:
Update..

Review your clock value (section 7 of datasheet) vs. Internal Pll use. Are you using usb on this design? If yes, from memory, believe you will require 24 mhz or some multiple of this value. The 16 mhz is not a standard value for xmos with usb enabled unless this clock is applied with an external Pll? With the xl prefixed cpu assuming there is no usb port in use for your design.


No, there is no USB in our design. We checked already the clock frequency : 16MHz is normally valid, the XL216 datasheet says that allowed frequency is 9 to 25MHz (giving 144MHz to 400MHz boot frequency).

Who is online

Users browsing this forum: No registered users and 1 guest