SPI in 9bit. Or re-enable SPI peripheral on-the-fly.

Technical questions regarding the XTC tools and programming with XMOS.
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SPI in 9bit. Or re-enable SPI peripheral on-the-fly.

Post by avrobot »

Hi. I need to use single SPI bus connected to two peripherals (using 2x CS IO). The issue I'm facing is one of those SPI devices requires 9bit data length on the SPI signals (its for a display). Xcore-200 device.
1. How can I reconfigure the SPI lib to send 9bits (not 8, 16 or 32) per transfer?
2. OR I could bit bang the SPI bus when communicating with the 9bit device, then I'd need to turn on/off the IO pins to the peripheral on-the-fly.
What is the process for changing the pin operation between general port (for bit bash) and peripheral? (is there a doc for this?)/
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Post by CousinItt »

Probably the simplest thing is to write your own bit-bang task to handle both; then that task would always have control of SPI port pins. That only makes sense if it's quick enough for your needs, however. How fast do you need the two interfaces to be?

Having quickly checked the SPI library code, changing it to support 9-bit transfers doesn't look easy. Maybe someone else here knows. Parallel usage rules make it difficult to access ports once they've been passed to a task like the SPI master. Either there would need to be some way to terminate it (and then re-enter when you wanted to use it again) or it would have to be rewritten to use a separate task that could handle the I/O sharing. Alternatively you could extend the SPI library to handle 9-bit exchanges in something like bit-bang style and use the normal 8-bit transfers the rest of the time. Again, I don't know how simple that would be.
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Post by mmar »

X dont have peripheral only general ports . SPI lib simulator need rewrite for 9 bits ... some LCD have too 8 bit 4 wire mode try use this...