QSPI clock speed on XCORE_AI_EXPLORER Topic is solved

Discussions relating to the XK-EVK-XU316
alex4d1
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Joined: Mon May 13, 2024 11:38 pm

QSPI clock speed on XCORE_AI_EXPLORER

Post by alex4d1 »

Hello,

The default bsp for the explorer board V2 has its QSPI clock frequency configured to 75MHz (clock divide 4).
It is using the Adesto AT25FF321A.

In the QSPI fast read thruput example I found the following info:
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## Supported Hardware
 
This example is supported on the XK_VOICE_L71 and XCORE_AI_EXPLORER boards.
 
On the XK_VOICE_L71 with Winbond W25Q64JW, SCLK is configured to 100 MHz, thus achieving a maximum theoretical thruput of 50 MB/s.
 
On the XCORE_AI_EXPLORER board with Adesto AT25FF321A, SCLK is configured for 75MHz, thus achieving a maximum theoretical thruput of 37.5 MB/s.
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And further down was the following additional instruction for the XK_VOICE_L71 with the Windbond flash:
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The Winbond W25Q64JW flash part requires a drive strength increase to maximize data valid duration at high frequency SCLKs.
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After a closer look at the data sheet of the Adesto part I noticed that it can also be clocked at 100MHz.
So I did a quick test and didn’t notice any issues.

Is there a particular reason why the QSPI clock in the Explorer reference BSP was chosen to be 75MHz? In other words, are there any concerns clocking it at 100MHz instead?

Thanks
Alex
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Joe
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Joined: Sun Dec 13, 2009 1:12 am

Post by Joe »

Hi,

If you look in table 19 of the AT25FF321A datasheet you can see the relevant max SCK speeds for the quad read IO command for different numbers of dummy clock cycles. The QSPI boot mode used by xmos expects the dummy cycles to be set to 6 (default) which for this device means the max speed is limited to 75MHz. You could set the double word alignment bit and it would then be rated for 133 but you would have to make sure all your code was reading from double word aligned starting addresses.

For fast read it's safer to stick to the winbond parts which are specified to higher speeds (up to 133MHz) while keeping dummy cycles at 6.

It will still likely work at 100MHz but there will probably be a corner case of PVT where it won't.

Cheers,
Joe
XMOS hardware grey beard.
alex4d1
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Joined: Mon May 13, 2024 11:38 pm

Post by alex4d1 »

In that case we will go with a Winbond device. Thank you Joe