Hi, We are looking to use the AI xcore for USB audio and DSP work.
Never used an Xcore before so sorry for such a silly question.
The web site https://www.xmos.com/dsp
says "800 MFLOPS sustained" . I assume this is per core given that a 400mhz single core ADI sharc DSP can sustain 1600MFLOPS.
I am correct?
I have currently designed for a ADI Sigma DSP and it currently takes about 5200 instructions.
Our design requires 32x32 48K 24Bit USB audio.
I plan to run that on Tile 1 and use Tile 2 for all DSP work.
Is the Ai chip up to the task?
Any advice greatly appreciated
Thanks
DSP Performance
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Hey!
On the 800 MFLOPS: I believe that's a number per tile, not per core as there's only one floating point unit per tile.
On ASB audio: I think you can do your calculations with the info on this page, from a quick look, you should be able to run 40 channels at 48k.
You can have a look at the various app notes on our website to get yourself going!
Good luck
On the 800 MFLOPS: I believe that's a number per tile, not per core as there's only one floating point unit per tile.
On ASB audio: I think you can do your calculations with the info on this page, from a quick look, you should be able to run 40 channels at 48k.
You can have a look at the various app notes on our website to get yourself going!
Good luck
Pavel
xmos software engineer
xmos software engineer
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I see,
The cores are not actual cores, Rather a thread within the Tiles single core CPU.
Thanks
The cores are not actual cores, Rather a thread within the Tiles single core CPU.
Thanks
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Hi,
I have an application using up to 7 cores on 1 tile for pure audio DSP treatment (mixing, filter/crossover/delay)
it all depends on the precision you want to have and the sampling rate.
if you use fixed point integer maths with 64bits accumulation, you can do a clean sequence (>130 db THD+N) of
input+biquad+delay+output in 212 instructions for a 8 sections biquad (eg 2 LR 4th + 4 peak equalization )
and you have 1000 instructions available per sample at 96khz so you can ave 4 channels treated with this sequence per each core.
if you do not care about quantization noise (see xmos app note AN02004) you can use the XS3 routine providing fast biquad with VPU for 8 sections filter, then you should be able to process this flow twice per sample.
if you want to use float 32bit you will need much more CPU than in 64bits fixed point math and noise is worse (for low frequency filter and high sampling rate).
assuming you have one task for audio i2s, you remain 7 cores for DSP and they can share the remaining mips (the i2s task takes less than 50% of a core at 96k)
hope this helps
fabriceo
I have an application using up to 7 cores on 1 tile for pure audio DSP treatment (mixing, filter/crossover/delay)
it all depends on the precision you want to have and the sampling rate.
if you use fixed point integer maths with 64bits accumulation, you can do a clean sequence (>130 db THD+N) of
input+biquad+delay+output in 212 instructions for a 8 sections biquad (eg 2 LR 4th + 4 peak equalization )
and you have 1000 instructions available per sample at 96khz so you can ave 4 channels treated with this sequence per each core.
if you do not care about quantization noise (see xmos app note AN02004) you can use the XS3 routine providing fast biquad with VPU for 8 sections filter, then you should be able to process this flow twice per sample.
if you want to use float 32bit you will need much more CPU than in 64bits fixed point math and noise is worse (for low frequency filter and high sampling rate).
assuming you have one task for audio i2s, you remain 7 cores for DSP and they can share the remaining mips (the i2s task takes less than 50% of a core at 96k)
hope this helps
fabriceo
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thanks,
I think my application will just fit @48Khz
I think my application will just fit @48Khz