"Mixing" chip generations

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
gruetzkopf
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Joined: Sat Jul 12, 2014 11:02 pm

"Mixing" chip generations

Post by gruetzkopf »

Seeing as there are no 3xx-series devices with GigE and no 2xx-series devices with external memory support, i've played with xntools and tried to make it route a network with different chip generations.
Attached is my last test, mixing XS3 with XS1-L (yeah i know, last resort test with XTC 15.2.1), but i've also tried XS1-L with XS2, XS2 with XS3 (this one with both 15.2.1 and 15.3.1).

Every combination i've tried results in

Code: Select all

$ xntools xk-test.xn --dump-network-graph
xk-test.xn:43 Error: XN11085 Switch architectures cannot be mixed.
Even without any link being configured between the two.

Now, i'd have expected that for XS1-G, but i was under the impression that the "newer" chips are compatible like that (except for tiny things like voltage levels) - as evidenced by XTAG-3 running a XS1L-U8 and being used for Xcore-200 chips.
Is that only true for "manually configured" links like the xSCOPE endpoint (and a true limit of the switches) or is that a tooling limitation (or much preferred, a mistake in my config file)?

Greetings,
Martin
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