I have to admit, I was quite confused by the change in terminology from Cores to "tiles", and from threads to "Cores".
Since you asked ... here is what I need to be able to do - and this is imperative.So what features over and above this do you think would be useful?
I don't want to ask that XMOS slow down innovation by delaying new product releases. I need a design path to the new products that impact my existing designs. I explain below:
Since I have XS1-G4 XMOS design in the works already (the XC-2 board), I need to know for sure how to connect SliceKit core boards into a hypercube topology. This looks like it can be done as is (https://www.xmos.com/node/16091?version=latest), but can you confirm that?
I am also counting on the availability of xLinks technology to communicate between all the cores - in my case between SliceKit Core Boards. Whatever you do, let us know if that changes! It can't go away ... please.
I was right in the middle of a research project with the G4 processor when you released SliceKits with the L2 processors on them - I have been using the XC2 ethernet kit. In particular, I was planning on building my solution up to a hypercube configuration (e.g. XMP-64 style design), with a varying number of processors.
All of my planned system metrics are built around the G4 processor. Looks like I'll have to re-configure using the XS1-L2 processor .... anything you've got that makes that transition easier would be helpful.
My concerns may be answered in the docs ... I'm still absorbing them. But that, in short, is what I need ..
:-)
Thanks!