sliceKIT is here!

[androider]

Thank you for releasing the SDRAM slice. I really needed that!

I have to admit, I was quite confused by the change in terminology from Cores to "tiles", and from threads to "Cores".

So what features over and above this do you think would be useful?

Since you asked ... here is what I need to be able to do - and this is imperative.

I don't want to ask that XMOS slow down innovation by delaying new product releases. I need a design path to the new products that impact my existing designs. I explain below:

Since I have XS1-G4 XMOS design in the works already (the XC-2 board), I need to know for sure how to connect SliceKit core boards into a hypercube topology. This looks like it can be done as is (https://www.xmos.com/node/16091?version=latest), but can you confirm that?


I am also counting on the availability of xLinks technology to communicate between all the cores - in my case between SliceKit Core Boards. Whatever you do, let us know if that changes! It can't go away ... please.


I was right in the middle of a research project with the G4 processor when you released SliceKits with the L2 processors on them - I have been using the XC2 ethernet kit. In particular, I was planning on building my solution up to a hypercube configuration (e.g. XMP-64 style design), with a varying number of processors.

All of my planned system metrics are built around the G4 processor. Looks like I'll have to re-configure using the XS1-L2 processor .... anything you've got that makes that transition easier would be helpful.

My concerns may be answered in the docs ... I'm still absorbing them. But that, in short, is what I need ..

:-)




Thanks!

[pstnotpd]

Since I have XS1-G4 XMOS design in the works already (the XC-2 board), I need to know for sure how to connect SliceKit core boards into a hypercube topology. This looks like it can be done as is (https://www.xmos.com/node/16091?version=latest), but can you confirm that?

I'm curious about that too

According to the L link design guidelines the L2 device used on the slicekit does not expose the 4 xmos links needed to build a hypercube.

So if I understand it correctly there is currently no "kit" available to actually build xmos hypercubes.

Am I wrong or, if not, is a there something planned?

[Folknology]

Since I have XS1-G4 XMOS design in the works already (the XC-2 board), I need to know for sure how to connect SliceKit core boards into a hypercube topology. This looks like it can be done as is (https://www.xmos.com/node/16091?version=latest), but can you confirm that?

I'm curious about that too

According to the L link design guidelines the L2 device used on the slicekit does not expose the 4 xmos links needed to build a hypercube.

So if I understand it correctly there is currently no "kit" available to actually build xmos hypercubes.

Am I wrong or, if not, is a there something planned?

The links you are looking for can be found on the Star and Square slice connectors(second page)

regards
Al

[segher]

I need to know for sure how to connect SliceKit core boards into a hypercube topology.

One xlink goes to each of the slots. Connect the slots of your boards
with cables or similar; take care of how you distribute power, and your
boot sequence, etc.

If you want a "pure" hypercube between the processors, you are limited
to 4 boards (8 "tiles"), since there are only 3 unique links coming from
each tile. If you want to form an hypercube from L2s, that is, a hypercube
with 2 tiles per corner, you have a maximum of 16 boards, 16 L2s, 32 tiles.
Both these topologies are possible with the routing tables.

You do not need to connect the boards in a hypercube; you can use other
topologies, both higher performance and less complicated topologies.

Finally, you can of course still use XC2 boards for your research project,
just make sure to get them while they are still available.

[Chendy]

Hi guys,

Been reading up all what I can before I dive in and get a Slicekit.

Just following up on a couple of questions I have had that have not been answered here. (also raised by user 'pstnotpd' a few posts back)

1. Device used?

The documentation 'Slicekit Hardware Manual' states:

A single XS1-L2-QF144 device has all of its GPIO connected to the Slots.

But this device doesn't seem to exist. What device is used?

2. Bug on board fixed?

Regarding the 'sliceKit Core Board 1v1 Connectivity Advisory':
If I were to buy from Digikey today, would this problem be present? It mentions:

This problem will be corrected in the 1V2 sliceKIT Core Board revision due later in 2012.

(I have sent a message to XMOS about this connectivity issue but regarding the device type used - I thought I would see if anyone knew here)

Thanks

Senthil

[segher]

The schematic says it is an XS1-L2-124QFN C5.

[Chendy]

Thanks segher.

I got a response from XMOS regarding the bug on board 1v1:

I could confirm that this issue is now fixed in the latest version of the board (1v2) and the boards that are getting shipped doesn't need this workaround. You could buy the board from Digikey. http://www.digikey.com/scripts/DkSearch ... ND&cur=USD

Senthil