I try to add SRC to the S/PDIF input in the USB Audio 2.0 Reference Software.
For example I want to receive S/PDIF@44100 input while all board works at 96000.
Please correct me if I am wrong.
Reference Design clocking scheme is:
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S/PDIF input -> SpdifReceive() -> ClockGen() -> (data) -> audio()
|-> (clock) -> output port -> PLL
1. Clock source = S/PDIF input, S/PDIF data is valid
In this case ClockGen() extracts clock from the input digital stream and all board CLKs is sync to the S/PDIF input.
2. (Clock source = Internal) or (Clock source = S/PDIF input, S/PDIF data is NOT valid)
In this case ClockGen() outputs clock from the internal clock generator and all board CLKs is sync to the internal clock.
Now I try to add SRC between SpdifReceive() and ClockGen(). Question is what to use: SSRC or ASRC?
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S/PDIF input -> SpdifReceive() -> SRC() -> ClockGen() -> (data) -> audio()
|-> (clock) -> output port -> PLL
In this case I think I need to use SSRC because SpdifReceive and ClockGen are sync to the same clock.
2. (Clock source = Internal) or (Clock source = S/PDIF input, S/PDIF data is NOT valid)
In this case I think I need to use ASRC like in the example AN00231_ASRC_SPDIF_TO_DAC. SpdifReceive and ClockGen are sync to the diferent clock.
Is my reasoning correct?